The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. However, these advances have increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed. In the course of integrated circuit evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased.
The ever-shrinking geometry size brings challenges to semiconductor fabrication. For example, as semiconductor device sizes become smaller and smaller, wafer warpage (e.g., the bending or warping of a wafer) may lead to defects some such via-induced-metal-bridge (VIMB), particularly for dies at or near an edge region of the wafer. These defects are difficult to detect and/or be corrected by conventional semiconductor fabrication methods and systems. Consequently, yields may be low, and/or customer confidence may erode.
Therefore, although existing methods and systems of fabricating semiconductor devices have been generally adequate for their intended purposes, they have not been entirely satisfactory in every aspect.